This article discusses some of the debug hooks a VP engineer builds into the platform:
SW debug tools-
* UART: UART is a very primitive RS-232 based debug port, as system boots for first time, BIOS developers often use UART to print all debug messages on the port. PCI Config policy, Processor policy etc can be dumped, SPD from DIMMs, MRC=Memory Reference Code on UART during run time.
* BIOS Diagnostics Post Code: A 2 segment display indicating BIOS POST codes
* Checkpoint: Code developers insert checkpoint codes to indicate flow of execution.
* Registers dumps* Memory Dumps
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